Design Automation Conference (DAC) 2026
July 26-30, 2026
Location: Long Beach Convention Center
Presenter: Alex Sludds, Ph.D., Photonic Architect
Title: Modeling DWDM CPO Systems at Scale: Photonic–Electronic Co-Simulation for 100+ Tb/s Interconnects
Abstract: The demand for extreme-scale computing, intensified by the push toward increasingly capable AI systems, is driving the need for major advances in compute density and interconnect bandwidth. Co-packaged optics (CPO) offers a compelling path forward by closely integrating electronic compute elements with high-density photonic interconnects.
Designing these tightly coupled photonic–electronic systems presents substantial challenges. Traditional simulation frameworks provide excellent device-level accuracy but often fall short in capturing system-level effects such as reflections, spectral interactions, nonlinear behavior, and package-induced coupling.
This talk describes a co-simulation and verification methodology for next-generation CPO systems, emphasizing the importance of unified photonic and electronic modeling that spans device physics, packaging parasitics, and system architecture. By leveraging an integrated simulation stack, we demonstrate how system-level behavior can be predicted more reliably, enabling faster iteration cycles and more confident first-time-right design of advanced optical-compute platforms.
Presenter: Moira Feng, Sr. Physical Design Methodology Engineer
Title: Agile Silicon: A GitOps-Based PD Orchestration Framework Enabling <10-Person PD Team to Deliver CPO Tapeouts
Abstract: Co-packaged optics (CPO) presents unique physical design challenges: numerous small blocks with irregular shapes to accommodate photonics and analog integration, combined with frequent RTL changes extending close to tapeout due to evolving system architectures of cutting edge silicon photonics design. Traditional manual PD flows widely used in the industry cannot sustain rapid iteration requirements while maintaining team scalability. We present a production-grade GitOps-based PD orchestration framework that treats PD recipes as version-controlled code, enabling automated synthesis through signoff with CI/CD integration. Our framework leverages YAML/Jinja configuration templates, parallel multi-block execution, commercial LLM APIs, and human-in-the-loop validation via automated QoR regression and Slack notifications. Deployed at Lighmatter, a fabless CPO company, this system enabled a team of fewer than 10 PD engineers to successfully deliver multiple testchip and product tapeouts with boosted productivity compared to industry baselines, while seamlessly absorbing RTL changes in the final two months before tapeout. Beyond immediate productivity gains, this infrastructure establishes the data collection and execution framework necessary for AI-agent-assisted PD optimization, providing auditable run histories and structured metrics that serve as training data for autonomous design exploration.
About DAC:
DAC is recognized as the global event for chips to systems. The event focuses on the latest methodologies and technology advancements for electronic design. The 63rd DAC will bring together researchers, designers, practitioners, tool developers, students, and vendors.
Learn more about our solutions:
Passage L200 3D CPO (co-packaged optics) Passage M1000 Superchip (active photonic interposer)